使用Stellar E1 BDAC輸出500Hz正弦波

tim_init(&DRV_TIM7);

(void)tim_set_presc(&DRV_TIM7, TIM_DIVIDE_BY(CLOCK_TIMCLK1 / 100000U));

(void)tim_set_trgo(&DRV_TIM7, TIM_TRGO_UPDATE);

tim_start(&DRV_TIM7);

tim_set_interval(&DRV_TIM7, 4000U);       /* 100kHz/4000 = 25Hz. */

tim_set_comparator(&DRV_TIM7, 1U, 2000U); /* Duty cycle 50%.     */

tim_enable(&DRV_TIM7);

dac_dma_conf_t dac_dma_conf;

dac_dma_conf.dma_stream_tx_id = DMA1_STREAM0_ID;

dac_dma_conf.dma_stream_bus_prio = DMA_PRIORITY_MAX;

dac_dma_conf.dma_stream_irq_prio = IRQ_PRIORITY_10;

dac_init(&BDACD);

(void)dac_set_dma_conf(&BDACD, &dac_dma_conf);

(void)dac_set_mode(&BDACD, DAC_DVR_MODE_SINGLE);

(void)dac_set_highfreq_mode(&BDACD, DAC_HF_MODE_OVER_160MHZ);

(void)dac_set_dma_mode(&BDACD, DAC_CHANNEL_1, DAC_DMA_ON);

(void)dac_set_format(&BDACD, DAC_CHANNEL_1, DAC_DATA_12BIT_RIGHT_ALIGN);

(void)dac_set_trigger_src(&BDACD, DAC_CHANNEL_1, DAC_CHx_TRIG2);

(void)dac_enable_trigger(&BDACD, DAC_CHANNEL_1, true);

(void)dac_set_wave(&BDACD, DAC_CHANNEL_1, DAC_WAVE_MODE_DISABLE);

(void)dac_set_rst_trigger_src(&BDACD, DAC_CHANNEL_1, DAC_RST_CHx_TRIG2);

(void)dac_set_output_connection(&BDACD, DAC_CHANNEL_1, DAC_OUT_CON_MODE_NORM_PIN_BUF_EN);

(void)dac_enable_channel(&BDACD, DAC_CHANNEL_1, true);

dac_start(&BDACD, (uint32_t *)&DAC_wave, 100);

BDAC_CH1輸出數據集；

uint32_t DAC_wave[100] = {0x0800, 0x0881, 0x0901, 0x0980, 0x09FD, 0x0A79, 0x0AF2, 0x0B68, 0x0BDA, 0x0C49,

                                               0x0CB3, 0x0D19, 0x0D79, 0x0DD4, 0x0E29, 0x0E78, 0x0EC0, 0x0F02, 0x0F3C, 0x0F6F,

                                              0x0F9B, 0x0FBF, 0x0FDB, 0x0FEF, 0x0FFB, 0x0FFF, 0x0FFB, 0x0FEF, 0x0FDB, 0x0FBF,

                                              0x0F9B, 0x0F6F, 0x0F3C, 0x0F02, 0x0EC0, 0x0E78, 0x0E29, 0x0DD4, 0x0D79, 0x0D19,

                                              0x0CB3, 0x0C49, 0x0BDA, 0x0B68, 0x0AF2, 0x0A79, 0x09FD, 0x0980, 0x0901, 0x0881,

                                              0x0800, 0x077F, 0x06FF, 0x0680, 0x0603, 0x0587, 0x050E, 0x0498, 0x0426, 0x03B7,

                                              0x034D, 0x02E7, 0x0287, 0x022C, 0x01D7, 0x0188, 0x0140, 0x00FE, 0x00C4, 0x0091,

                                              0x0065, 0x0041, 0x0025, 0x0011, 0x0005, 0x0001, 0x0005, 0x0011, 0x0025, 0x0041,

                                              0x0065, 0x0091, 0x00C4, 0x00FE, 0x0140, 0x0188, 0x01D7, 0x022C, 0x0287, 0x02E7,

                                              0x034D, 0x03B7, 0x0426, 0x0498, 0x050E, 0x0587, 0x0603, 0x0680, 0x06FF, 0x077F};

在dac_start配置DMA相關參數，觸發源需選擇DMAMUX1_BDAC1_CH1；

if (ddp->dma_mode[DAC_CHANNEL_1] == DAC_DMA_ON) {

ddp->dac->CR |= ((uint32_t)ddp->dma_mode[DAC_CHANNEL_1]) << DAC_CR_DMAEN1_Pos;

ddp->dac->CR |= DAC_CR_DMAUDRIE1;

/* TODO: Configure DMA descriptor for ch1.*/

ddp->dma_tx_descriptor = dma_stream_take(ddp->dma_conf->dma_stream_tx_id,

                 ddp->dma_conf->dma_stream_irq_prio,

                 dac_serve_dma_tx_interrupt,

                 (void *)ddp);

  /* Configure DMA stream peripheral addresses.*/

 dma_stream_set_peripheral(ddp->dma_tx_descriptor, (uint32_t)(&ddp->dac->DHR12R1));

dma_stream_set_memory(ddp->dma_tx_descriptor,(uint32_t)addr);

/* Configure DMA TX/RX triggers.*/

dma_stream_set_trigger(ddp->dma_tx_descriptor, DMAMUX1_BDAC1_CH1);

dma_stream_set_count(ddp->dma_tx_descriptor,cnt);

dma_tx_mode = DMA_CCR_PL_VALUE(ddp->dma_conf->dma_stream_bus_prio) |

                      DMA_CCR_DIR_M2P | DMA_CCR_TCIE;

        /* Configure DMA memory increment mode.*/

dma_tx_mode |= DMA_CCR_MINC;

dma_tx_mode |= DMA_CCR_CIRC;

 /* Configure DMA frame size.*/

dma_tx_mode |= DMA_CCR_PSIZE_WORD | DMA_CCR_MSIZE_WORD;

 /* Set up calculated DMA modes.*/

dma_stream_set_transfer_mode(ddp->dma_tx_descriptor, dma_tx_mode);

dma_stream_enable(ddp->dma_tx_descriptor);

        /* Enable DMA transmitter.*/

    }